VARIANTS OF IMPLEMENTATION AND STRUCTURE OF HARDWARE ARBITER OF COMMON BUS
FOR MULTIPROCESSOR SYSTEM 

Martyshkin Aleksey Ivanovich, candidate of technical sciences, associate professor, sub-department of computers and systems,
Penza State Technological University, E-mail: alexey314@yandex.ru 

004.31 

Background. Today, when the speed of computing systems has reached colossal rates, the problem of productivity remains topical, including because the range of tasks solved on a computer has grown significantly, and because the complexity of the tasks has increased. One of the solutions to this problem was the emergence of multi-core and multiprocessor computing systems (for example, based on a common bus). Often in them, there is a problem of distribution (assignment) of processors on processing of tasks.
Here, the organization of the tire arbitrator, which manages the process of occupying and releasing the common tire, has considerable influence. This is due to the relevance of the article. The purpose of the work is to create and describe the structure of the hardware arbiter of the common bus of the multiprocessor system, which includes 16 processors.
Materials and methods. To achieve the goals set in the work, CAD Web pack ISE from Xilinx Company is applied with the ability to create and simulate the work of the hardware arbiter unit, which facilitates the synthesis of projects focused on the use of a modern element base – PLD.
Results. The article considers possible options for implementing a hardware arbiter. Their advantages and disadvantages are described. The composition of the proposed device is described. A block diagram of a computer system including a common bus arbiter is presented.
Conclusions. The conclusion of the article presents the results and conclusions, which tell about the results of the research and the further development of the project. In the future, it is proposed to implement a hardware arbiter in the form of an expansion board using PLDs. The field of application of the associative coprocessor are multiprocessor systems based on signal processors such as TMS320 or similar. 

hardware arbiter, common bus, multiprocessor system, static priorities, dynamic priorities, centralized arbitration, decentralized arbitration, PLD